|
Hardware Architectures for Post-Quantum Digital Signature Schemes
Description
1st ed. 2021 Edition
by Deepraj Soni (Author), Kanad Basu (Author), Mohammed Nabeel (Author), Najwa Aaraj (Author), Marc Manzano (Author), Ramesh Karri (Author)
This book explores C-based design, implementation, and analysis of post-quantum cryptography (PQC) algorithms for signature generation and verification. The authors investigate NIST round 2 PQC algorithms for signature generation and signature verification from a hardware implementation perspective, especially focusing on C-based design, power-performance-area-security (PPAS) trade-offs and design flows targeting FPGAs and ASICs.
- Describes a comprehensive set of synthesizable c code base as well as the hardware implementations for the different types of PQC algorithms including lattice-based, code-based, and multivariate-based;
- Demonstrates the hardware (FPGA and ASIC) and hardware-software optimizations and trade-offs of the NIST round 2 signature-based PQC algorithms;
- Enables designers to build hardware implementations that are resilient to a variety of side-channels.
Details
Year:
2021
Pages:
185
Language:
English
Format:
PDF, EPUB
Size:
23 MB
ISBN-10:
3030576817
ISBN-13:
978-3030576813
ASIN:
B08M3V7HDB
Share this product
You might also be interested in one of these books
|
KETAB DOWNLOAD
Digital Design Using VHDL: A Systems Approach
|
KETAB DOWNLOAD
Microwave Bandpass Filters for Wideband Communications
|
KETAB DOWNLOAD
Modern Aerodynamic Methods for Direct and Inverse Applications